1 precision edge sy89426 micrel, inc. m9999-112105 hbwhelp@micrel.com or (408) 955-1690 single chip source for 622.08mhz and 155.52mhz clocks 622.08mhz output is differential pecl, 155.52mhz output is single-ended pecl ttl/cmos compatible inputs and reference output sonet compliant jitter performance ( 0.01ui) choice of three reference frequencies only 395mw (typ) complies with bellcore, ccitt and ansi standards single +5 volt power supply fully compatible with industry standard 10kh i/o levels available in 28-pin plcc package typical application precision edge sy89426 features description micrel's sy89426 multi-output phase locked loop (pll) is a sonet compliant clock generator providing 622.08mhz, 155.52mhz and retimed reference clock outputs. the pll produces low jitter oc-12/sts-12 and oc-3/sts-3 rate clocks from an input reference clock of 38.88, 51.84, or 77.76mhz. additionally, the input reference clock is retimed and provided as a ttl/cmos compatible output, which may be disabled to minimize switching noise. the sy89426 operates from a single +5 volt supply, and requires only a simple series rc loop filter. coupling micrel's advanced pll technology with our proprietary asset bipolar process has produced a clock generator ic which exceeds applicable bellcore and ansi specifications, while setting a new standard for performance and flexibility. sonet oc-12/oc-3 clock synthesizer 0.1uf fltrn rfck (ttl) sel39 (ttl) sel78 (ttl) ck622p (pecl) 1000 ? retrfck (ttl) 155.52mhz clock out sy89426 vcc vcco clock in fltrp gnd rst (ttl) disc (ttl) retimed refout ck155 (pecl) ck622n 622.08mhz clock out +3v 2x 50 ? +3v 50 ? +5v +5v rev.: h amendment: /0 issue date: november 2005 precision edge precision edge is a registered trademark of micrel, inc. asset is a trademark of micrel, inc.
2 precision edge sy89426 micrel, inc. m9999-112105 hbwhelp@micrel.com or (408) 955-1690 package/ordering information 2 8-pin plcc (j28-1) ordering information (1) package operating package lead part number type range marking finish sy89426jc j28-1 commercial sy89426jc sn-pb sy89426jctr (2) j28-1 commercial sy89426jc sn-pb SY89426JY (3) j28-1 industrial SY89426JY with matte-sn pb-free bar line indicator pb-free SY89426JYtr (2, 3) j28-1 industrial SY89426JY with matte-sn pb-free bar line indicator pb-free notes: 1. contact factory for die availability. dice are guaranteed at t a = 25 c, dc electricals only. 2. tape and reel. 3. pb-free package is recommended for new designs. 26 27 28 1 2 3 4 18 17 16 15 14 13 12 25 24 23 22 21 20 19 56 7 8 91011 gnd gnd gnd nc nc gnd gnd nc v cc fltrp rst retrfck v cc v cc disc fltrn plcc top view j28-1 v cc ck622p ck622n v cco ck155 gnd gnd sel39 rfck v cc nc sel78 inputs rfck [reference clock] ttl reference clock in. (38.88, 51.84 or 77.76mhz). sel39 [38.88mhz select] ttl logic high on this pin denotes a 38.88mhz input reference clock. tie to logic low if input is not 38.88mhz. sel78 [77.76mhz select] ttl logic high on this pin denotes a 77.76mhz input reference clock. tie to logic low if input is not 77.76mhz. rst [reset] ttl tie to logic low for normal operation; logic high forces reset of internal phase detector & feedback dividers. fltrp, fltrn [loop filter, pos & neg] analog connect a series rc loop filter between these pins. the suggested rc values are 500 ? and 0.1 f, as shown in the typical application. disc [disable clock] ttl logic high on this pin disables the retimed reference clock output retrfck); if this output is not required, it is recommended that it be disabled to reduce switching noise. a logic low enables the output. pin description outputs ck622p, ck622n [622 clock output] differential pecl. 622.08mhz output clock from pll b. ck155 [155 clock out] single-ended pecl 155.52mhz output clock. retrfck [retimed reference clock out] ttl an output clock with the same frequency as the input reference clock (rfck) and a 45-55% duty cycle. this output is derived by dividing the 622.08mhz output by the appropriate factor (e.g., divide by 16 for a 38.88mhz inout reference; divide by 12 for 51.84mhz in; or divide by 8 for 77.76mhz in). power & ground v cc +5v for internal circuits. v cco +5v for pecl outputs. gnd ground (0 volts).
3 precision edge sy89426 micrel, inc. m9999-112105 hbwhelp@micrel.com or (408) 955-1690 functional block diagram fltrp/n v cco 57 rfck (ttl) sel39 (ttl) sel78 (ttl) rst (ttl) ck622p (pecl) ck622n ck155 (pecl) retrfck (ttl) disc (ttl) /f chg pump 622mhz vco feedback 2/3/4 divider 4 v cca gnd sel39 sel78 frfck 0 0 51.84 0 1 77.76 1 0 38.88 1 1 77.76 reference frequency selection (1) note: 1. airflow greater than 500lfpm is maintained.
4 precision edge sy89426 micrel, inc. m9999-112105 hbwhelp@micrel.com or (408) 955-1690 v cc = v cco = +5v 5%; gnd = 0v; t a = 40 c to 85 c symbol parameter min. max. unit condition v oh output high voltage 2.4 vi oh = 2ma v ol output low voltage 0.5 v i ol = 4ma i os output short circuit current 150 60 ma v out = 0 v ih input high voltage 2.0 v v il input low voltage 0.8 v note: 1. airflow greater than 500lfpm is maintained. ttl dc electrical characteristics (1) symbol parameter rating unit v cc power supply 0 to +7 v v in input voltage 0 to v cc v i out output current continuous 50 ma surge 100 ma t a operating temperature range 40 to +85 c t lead lead temperature (soldering, 20 sec.) +260 c t store storage temperature range 65 to +150 c notes: 1. permanent device damage may occur if absolute maximum ratings are exceeded. this is a stress rating only and functional oper ation is not implied at conditions other than those detailed in the operational sections of this data sheet. exposure to absolute maximum rating co nditions for extended periods may affect device reliability. 2. airflow greater than 500lfpm is maintained. absolute maximum ratings (1), (2) pecl dc electrical characteristic (1), (2) t a = 40 ct a = 0 ct a = +25 ct a = +85 c symbol parameter min. max. min. max. min. max. min. max. unit v oh output high voltage v cc -1130 v cc -840 v cc -1070 v cc -790 v cc -1030 v cc -760 v cc -960 v cc -670 mv v ol output low voltage v cc -2000 v cc -1600 v cc -2000 v cc -1580 v cc -2000 v cc -1580 v cc -2000 v cc -1545 mv v ih input high voltage (1) v cc -1230 v cc -890 v cc -1170 v cc -840 v cc -1130 v cc -810 v cc -1060 v cc -720 mv v il input low voltage (1) v cc -1950 v cc -1500 v cc -1950 v cc -1480 v cc -1950 v cc -1480 v cc -1950 v cc -1445 mv i il input low current 0.5 0.5 0.5 0.3 a notes: 1. forcing one input at a time. apply v ih (max) or v il (min) to all other inputs. 2. airflow greater than 500lfpm is maintained. v cc = v cco = +5v 5%; gnd = 0v; t a = 40 c to 85 c symbol parameter min. typ. max. unit condition i ee internal operating current 79 120 ma i out termination output current 11 ma 50 ? to vcc -2, 50% duty cycle dc electrical characteristics ttl v cc = v cco = +5v 5%; gnd = 0v; t a = 40 c to 85 c dc electrical characteristics (1) note: 1. airflow greater than 500lfpm is maintained.
5 precision edge sy89426 micrel, inc. m9999-112105 hbwhelp@micrel.com or (408) 955-1690 dc electrical characteristics ttl timing waveform rfck input ck622 output tp ref tp 622 tp 155 (1) retrfck output ck155 output note: 1. does not a pp l y to 52mhz reference parameter min. typ. max. units condition vco center frequency 622.08 1% mhz nominal 20 ppm 77.76mhz 20 ppm 51.84mhz 10 ppm 38.88mhz reference clock (rfck) input duty cycle 45 55 % of ui reference clock (retrfck) output duty cycle 40 60 % of ui 15pf load acquisition lock time 15 sec ttl output rise/fall time 2 ns 10% to 90% of amplitude, 15pf load pecl output rise/fall time 500 ps 10% to 90%, 50 ? load, 5pf cap ck622 output duty cycle 45 55 % of ui ck155 output duty cycle 45 55 % of ui trst rst pulse width 1 sec tp622 static phase offset of ck622 190 400 600 ps tp155 static phase offset of ck155 250 400 750 ps tpref static phase offset of retrfck +3.5 ns ac electrical characteristics (1) v cc = v cco = +5v 5%; gnd = 0v; t a = 40 c to 85 c reference clock (rfck) frequency tolerance note: 1. airflow greater than 500lfpm is maintained.
6 precision edge sy89426 micrel, inc. m9999-112105 hbwhelp@micrel.com or (408) 955-1690 jitter generation jitter generation definition bellcore tr-nwt-000499 (issue 4), section 7.3.3 "jitter generation is the process whereby jitter appears at the output port of an individual unit of digital equipment in the absence of applied input jitter." jitter generation requirement bellcore ta-nwt-000253 (issue 2), section 5.6.5.2 "for category ii interfaces, jitter generation shall not exceed 0.01 ui rms. for oc-n and stsx-n interfaces, a high-pass measurement filter with a 12khz cutoff frequency shall be used." the low-pass cutoff frequency of the measurement filter shall be higher than 5mhz. the characteristic of the measurement filter is shown below. sonet oc-12 category ii jitter generation measurement filter characteristics figure 1 +20db/decade ui (rms) 0.01 12khz frequency 5mhz (minimum)
7 precision edge sy89426 micrel, inc. m9999-112105 hbwhelp@micrel.com or (408) 955-1690 28-pin plcc (j28-1) rev. 03 micrel, inc. 2180 fortune drive san jose, ca 95131 usa tel + 1 (408) 944-0800 fax + 1 (408) 474-1000 web http://www.micrel.com the information furnished by micrel in this datasheet is believed to be accurate and reliable. however, no responsibility is as sumed by micrel for its use. micrel reserves the right to change circuitry and specifications at any time without notification to the customer. micrel products are not designed or authorized for use as components in life support appliances, devices or systems where malfu nction of a product can reasonably be expected to result in personal injury. life support devices or systems are devices or systems that (a) are intend ed for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant inj ury to the user. a purchaser s use or sale of micrel products for use in life support appliances, devices or systems is at purchaser s own risk and purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. ? 2005 micrel, incorporated.
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